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Industrial scale formal verification using concurrent GSTE

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3 Author(s)
Jin Yang ; Intel Corp., Santa Clara, CA ; Ghughal, R. ; Tiemeyer, A.

We give a detailed description of the formal specification and verification of a complex Intel(R) Pentium(R) 4 resource scheduler with over one thousand state elements using concurrent GSTE (CGSTE) l. CGSTE is a powerful extension of GSTE (generalized symbolic trajectory evaluation) for succinctly specifying and efficiently verifying the concurrent behavior of a complex circuit. We show how an operational high level specification (HLS) for the hardware was developed and cleanly captured in an algebraic-style specification language in CGSTE. The correctness of the hardware implementation was automatically verified against the HLS using the CGSTE model checker in the matter of two minutes

Published in:

ASIC, 2005. ASICON 2005. 6th International Conference On  (Volume:2 )

Date of Conference:

24-0 Oct. 2005

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