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Design and fabrication of high-performance polycrystalline silicon thin-film transistor circuits on flexible steel foils

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4 Author(s)
T. Afentakis ; Dept. of Electr. Eng., Lehigh Univ., Bethlehem, PA, USA ; M. Hatalis ; A. T. Voutsas ; J. Hartzell

This paper discusses in detail the design and fabrication process for the realization of high-performance polycrystalline silicon thin-film transistors and digital CMOS circuitry on thin flexible stainless steel foils. A comprehensive approach to substrate preparation is first presented. For transistor fabrication, distinct processing approaches are examined, such as solid-phase and excimer laser crystallization for the active semiconductor region, thermal growth and chemical vapor deposition for the gate insulator, and others. It is shown that process optimization has resulted in the fabrication of CMOS transistors with field-effect mobility values in the region of 200 cm2/V·s and ION/IOFF current ratios of at least seven orders of magnitude. The design and performance of high-speed digital CMOS is addressed, and the effects of the conductive foil through parasitic capacitive coupling are examined. CMOS inverter blocks in ring oscillator circuits operating with delay times as low as 1.12 ns are reported, as well as static and dynamic shift registers operating in the megahertz regime.

Published in:

IEEE Transactions on Electron Devices  (Volume:53 ,  Issue: 4 )