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On the gate capacitance limits of nanoscale DG and FD SOI MOSFETs

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4 Author(s)
Lixin Ge ; Freescale Semicond., Austin, TX, USA ; Gamiz, F. ; Workman, G.O. ; Veeraraghavan, S.

An analytical total gate capacitance CG model for symmetric double-gate (DG) and fully depleted silicon-on-insulator (FD/SOI) MOSFETs of arbitrary Si film is developed and demonstrated. The model accounts for the effects of carrier-energy quantization and inversion-layer screening and is verified via self-consistent numerical solutions of the Poisson and Schrödinger equations. Results provide good physical insight regarding CG degradation due to quantization and screening governed by device structure and/or transverse electric field for nanoscale DG and FD/SOI MOSFETs. Two limits of CG at ON-state are then derived when the silicon film tSi approaches zero and infinity. The effect of inversion-layer screening on CG, which is significant for ultrathin Si-film DG MOSFETs, is quantitatively defined for the first time. The insightful results show that the two-dimensional screening length for DG MOSFETs is independent of the doping density and much shorter than the bulk Debye length as a result of strong structural confinement.

Published in:

Electron Devices, IEEE Transactions on  (Volume:53 ,  Issue: 4 )

Date of Publication:

April 2006

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