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Memory characteristics of MOSFETs with densely stacked silicon nanocrystal Layers in the gate oxide synthesized by low-energy ion beam

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4 Author(s)
C. Y. Ng ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; T. P. Chen ; L. Ding ; S. Fung

Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperatures have been investigated. A threshold voltage window of ∼ 0.5 V is achieved under write/erase (W/E) voltages of +12 V/-12 V for 1 ms. The devices exhibit good endurance up to 105 W/E cycles even at a high operation temperature of 150°C. They also have good retention characteristics with an extrapolated ten-year memory window of ∼ 0.3 V at 100°C.

Published in:

IEEE Electron Device Letters  (Volume:27 ,  Issue: 4 )