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A 23-24 GHz low power frequency synthesizer in 0.25μm SiGe

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7 Author(s)
O. Mazouffre ; IXL Lab., Bordeaux Univ., Talence, France ; H. Lapuyade ; J. -B. Begueret ; A. Cathelin
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This paper presents the design and the experimental measurements of a 24 GHz fully integrated fractional PLL, for ISM band, with a new low power prescaler. This circuit is implemented in a 0.25 μm SiGe:C process from STMicroelectronics (BiCMOS7RF). The PLL power dissipation is 170 mW and fulfills a 23.7 to 24.9 GHz frequency locking range, while exhibiting a phase noise of -100 dBc/Hz at 100 kHz from the carrier. The simulated PLL unity-gain bandwidth is 36 MHz, with a phase margin of 54°. The PLL uses a new latch-based prescaler (SRO) which exhibits a power dissipation of 0.68 GHz/mW.

Published in:

2005 European Microwave Conference  (Volume:3 )

Date of Conference:

4-6 Oct. 2005