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Asynchronous reconfigurable computing array design

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3 Author(s)
Jiale Zhang ; Coll. of Comput. Sci. & Technol., Zhejiang Univ., Hangzhou, China ; Xuezeng Pan ; Haibin Shen

We present a novel architecture of asynchronous reconfigurable computing array (ARCA) to seek the balance between performance and versatility. Advancing the completion detector of control circuit, a modified structure of asynchronous micropipeline based on DSDCVSL is discussed. The analysis and simulation of our ARCA have both resulted in high-performance and low-power consumption, and it can be used as an IP module integrated into a system on chip to built the reconfigurable computing platform.

Published in:

Embedded Software and Systems, 2005. Second International Conference on

Date of Conference:

16-18 Dec. 2005

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