Referenced Items are not available for this document.
We present a novel architecture of asynchronous reconfigurable computing array (ARCA) to seek the balance between performance and versatility. Advancing the completion detector of control circuit, a modified structure of asynchronous micropipeline based on DSDCVSL is discussed. The analysis and simulation of our ARCA have both resulted in high-performance and low-power consumption, and it can be used as an IP module integrated into a system on chip to built the reconfigurable computing platform.
Published in:
Embedded Software and Systems, 2005. Second International Conference on
Date of Conference: 16-18 Dec. 2005
- Print ISBN:
- 0-7695-2512-1
- INSPEC Accession Number:
- 8894402
- Digital Object Identifier :
- 10.1109/ICESS.2005.33
- Product Type:
- Conference Publications
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