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A new nano-electro-mechanical field effect transistor (NEMFET) design for low-power electronics

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4 Author(s)
Hei Kam ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA ; Lee, D.T. ; Howe, R.T. ; Tsu-Jae King

An accumulation-mode design for nanometer-scale electromechanical-gate field effect transistors (NEMFETs) is proposed and studied via simulation. In the off state, the gate electrode is in contact with the thin gate dielectric and short-channel effects are effectively suppressed. In the on state, the gate electrode is separated from the thin gate dielectric so that the threshold voltage VT is dynamically lowered and the transistor drive current I on is enhanced, and gate leakage is eliminated. The NEMFET can likely meet performance specifications for low-power applications at 25 nm gate length, and is attractive for scaled supply voltage operation

Published in:

Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International

Date of Conference:

5-5 Dec. 2005

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