Referenced Items are not available for this document.
A cache is presented with a single dual-port directory which can be used for both the processor accesses and coherence operations simultaneously. The complexity of such a dual-port directory cache is far less than that of a traditional two-directory cache. A bus-based shared-memory multiprocessor model with dedicated private caches is described. Summarized results from extensive simulations are presented, and the performance of the multiprocessor system with the dual-port directory caches is evaluated
Published in:
Communications, Computers and Signal Processing, 1991., IEEE Pacific Rim Conference on
Date of Conference: 9-10 May 1991
- Page(s):
- 215 - 218 vol.1
- Meeting Date :
- 09 May 1991-10 May 1991
- Print ISBN:
- 0-87942-638-1
- INSPEC Accession Number:
- 4199049
- Conference Location :
- Victoria, BC
- Digital Object Identifier :
- 10.1109/PACRIM.1991.160718
- Product Type:
- Conference Publications
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