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A novel high-performance and robust sense amplifier using independent gate control in sub-50-nm double-gate MOSFET

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3 Author(s)
S. Mukhopadhyay ; Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA ; H. Mahmoodi ; K. Roy

Double-gate (DG) transistor has emerged as one of the most promising devices for nano-scale circuit design. In this paper, we propose a high-performance and robust sense-amplifier design using independent gate control in symmetric and asymmetric DG devices for sub-50-nm technologies. The proposed sense amplifier has better performance (30%-35% less sensing delay) and robustness (60%-80% less minimum input bit-differential for correct operation considering 10% worst case silicon thickness mismatch) compared to the connected gate design. Hence, the proposed design successfully demonstrates the benefit of using independent gate control in DG devices for efficient circuit design in sub-50-nm regime.

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:14 ,  Issue: 2 )