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A multichip packaged GaAs 16×16 parallel multiplier

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6 Author(s)
Sekiguchi, T. ; Sumitomo Electric Ind. Ltd., Yokohama, Japan ; Sawada, S. ; Hirose, T. ; Nishiguchi, M.
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A GaAs 16×16 bit parallel multiplier utilizing multichip packaging technology is demonstrated. This multichip approach is undertaken in an effort to realize GaAs ULSIs with high yield and reliability, using multiple smaller scale integrated circuits. The device is composed of four GaAs 8×8 expandable parallel multipliers and a multichip package (MCP). The developed 8×8 b multipliers consist of 1097 E/D DCFL gates each and have a 2.4-ns multiplication time. The developed MCP is composed of five layers of alumina ceramic which include 50-Ω strip lines. The multiplication time of this 16×16 b multichip multiplier is 7.6 ns, and the total production yield is 70%

Published in:

Components, Hybrids, and Manufacturing Technology, IEEE Transactions on  (Volume:15 ,  Issue: 4 )

Date of Publication:

Aug 1992

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