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A multifunctional test chip for microelectronic packaging and its application on RF property measurements

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4 Author(s)
Kun-Fu Tseng ; Dept. of Electron. Eng., Chin-Min Inst. of Technol., Miao-Li, Taiwan ; Yi-Hsun Hsion ; Ben-Je Lwo ; Chin-Hsing Kao

In this paper, we developed a multifunctional test chip for property extractions on packaging design. Components in this test chip include diodes as the temperature sensor; polysilicon units as the heater; piezoresistors as the stress sensor; and pads as well as the related metal connector designs for electrical parameter extractions. To save sensor numbers and connecting wires, sensors on the test chip surface were put according to structure symmetry. Since different microelectronic packaging has individual size, components on test chip surface were laid based on assembly of small unit cells so that the flexible test chip size can be employed to fit requirements from different packaging dimensions. Besides, we considered the inductance/capacitance extractions of packages for high frequency condition. A test structure was finally designed to cooperate the QFP packages for the RLC measurement, and the availability of the designed was demonstrated from testing data.

Published in:

Electronics Materials and Packaging, 2005. EMAP 2005. International Symposium on

Date of Conference:

11-14 Dec. 2005

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