A real-time FPGA-based architecture for optical flow computation

Motion estimation of a scene is an interesting problem in computer vision since it is the basis for the dynamic analysis of a scene. However this task is computational intensive for conventional processors. In this work, a FPGA-based hardware architecture for real-time motion estimation is proposed. The technique used for motion estimation is a variation of the optical flow algorithm where the problem is reformulated as a sum of overlapped basis functions, and solved as a linear system. The proposed architecture is based on a systolic approach and is composed of parallel modules organized in a regular structure. The systolic processor accelerates the matrix operations required to achieve real-time performance. The architecture design is presented. Preliminary results are shown and discussed