By Topic

Mapping applications to NoC platforms with multithreaded processor resources

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
R. Pop ; Dept. of Electron. & Comput. Eng., Jonkoping Univ., Sweden ; S. Kumar

Network on chip (NoC) is a new design paradigm for building scalable core-based systems on chip (SoC). Multithreading is a technique for hiding long latencies of memory accesses, through the overlapped execution of several threads. In this paper, we make a case for using multi-threaded processors (MTP) as resources in NoC and describe a methodology for off-line mapping and scheduling of concurrent applications to NoC with MTPs. The experimental results show a speedup of 15% on average for a 2×2 NoC when using two MTPs with 3-thread contexts instead of two general processors (GP).

Published in:


Date of Conference:

21-22 Nov. 2005