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Hybrid Algorithm for Mapping Static Task Graphs on Multiprocessor SoCs

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3 Author(s)
Orsila, H. ; Tampere Univ. of Technol., Tampere ; Kangas, T. ; Hamalainen, T.D.

Mapping of applications on multiprocessor system-on-chip is a crucial step in the system design to optimize the performance, energy and memory constraints at the same time. The problem is formulated as finding solutions to an objective function of the algorithm performing the mapping and scheduling under strict constraints. Our solution is a new hybrid algorithm that distributes the computational tasks modeled as static acyclic task graphs The algorithm uses simulated annealing and group migration algorithms consecutively and it combines a non-greedy global and greedy local optimization techniques to have good properties of both ways. The algorithm begins as coarse grain optimization and moves towards fine grained optimization. As a case study we used ten 50-nodc graphs from the Standard Task Graph Set and averaged results over 100 optimization runs. The hybrid algorithm gives 8% better execution time on a system with four processing elements compared to simulated annealing. In addition, the number of iterations increased only moderately, which justifies the new algorithm in SoC design.

Published in:

System-on-Chip, 2005. Proceedings. 2005 International Symposium on

Date of Conference:

17-17 Nov. 2005