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Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems

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3 Author(s)
P. Kukkala ; TAmpere University of Technology Institute of Digital and Computer Systems P.O. Box 553, FI-33101 Tampere, Finland, ; M. Hannikainen ; T. D. Hamalainen

This paper presents a new performance modeling approach for the design of embedded real-time systems using UML 2.0. The approach responds to the lack of specific semantics for the performance modeling. The existing UML metamodel is extended by defining stereotypes to include the message latency and execution time in UML statecharts. The information may contain both the real-time constraints and measured values that are back-annotated to the UML model. Further, fully automated model transformation is used to visualize this information with sequence diagrams. The modeling approach has been prototyped with the UML implementation of a WLAN medium access control protocol. The experiences proved the approach to be practical and intuitive.

Published in:

2005 International Symposium on System-on-Chip

Date of Conference:

17-17 Nov. 2005