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Co-synthesis of a configurable SoC platform based on a network on chip architecture

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2 Author(s)
Vestias, M.P. ; INESC-ID, Lisboa ; Neto, H.C.

The constant increase of gate capacity and performance of configurable hardware chips made it possible to implement systems-on-chip (SoC) able to tackle the demanding requirements of many embedded systems. In this paper, we propose an approach to the design space exploration of a configurable SoC (CSoC) platform based on a network on chip (NoC) architecture for the execution of dataflow dominated embedded systems. The approach has been validated with the design of a color image compression algorithm in an FPGA

Published in:

Design Automation, 2006. Asia and South Pacific Conference on

Date of Conference:

24-27 Jan. 2006