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ePAPP: a gigabit embedded protocol analyzer pre-processor

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3 Author(s)
Hoare, R.R. ; Dept. of Electr. & Comput. Eng., Pittsburgh Univ., PA, USA ; Ying Yu ; Repanshek, J.J.

Network has been growing rapidly in both transmission bandwidth and transmission speed. This increase in speed reduces processing time a network device has for each packet. This paper presents a hardware embedded protocol analyzer pre-processor (ePAPP) that performs the protocol analysis of network packets. It replaces the software protocol analysis program running on processors, with a significant performance increase, and protocol adaptation flexibility. A prototype of ePAPP supporting various protocols including Ethernet, IPv4, ARP, TCP, and UDP, has been designed in VHDL and synthesized. When implemented on the NEC instant silicon solutions platform (ISSP), a structured ASIC technology based on 0.13-micron process, ePPAP can achieve 2.88 Gb/s processing rate, using less than 1% of available logic cells.

Published in:

Circuits and Systems, 2005. 48th Midwest Symposium on

Date of Conference:

7-10 Aug. 2005