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An efficient way of passing of data in a multithreaded scheduled dataflow architecture

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4 Author(s)
Arul, J.M. ; Fu Jen Catholic Univ., Taipei ; Yeh, T. ; Chiacheng Hsu ; Janjr Li

The scheduled dataflow (SDF) architecture deviates from current trend of building complex hardware to exploit instruction level parallelism (ILP) by exploring a simpler, yet powerful execution paradigm that is based on dataflow, multithreading and decoupling of memory accesses from execution. A program is partitioned into non-blocking threads and all memory accesses are decoupled from the thread's execution. Data is pre-loaded into the thread's context (registers), and all results are post-stored after the completion of the thread's execution. This paper presents an efficient way of storing of data into the thread's register context directly as opposed to storing of data into the frame memory. This way eliminates the need for creating thread frames when there are sufficient register contexts available in the system. Thus, it is possible to explore the scalability of SDF architecture's performance when more register contexts are available on the chip. All the benchmarks ran using these two methods show performance improvement of at least about 20%. This method of allocating data to a consecutive thread in a multithreaded architecture could be applied generally

Published in:

High-Performance Computing in Asia-Pacific Region, 2005. Proceedings. Eighth International Conference on

Date of Conference:

1-1 July 2005

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