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A Simple, Low-Cost and Low-Power Switch Architecture for NoCs

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4 Author(s)
Nazm-Bojnordi, M. ; Low-Power High-Performance Nano-Systems Laboratory Electrical and Computer Engineering Department, University of Tehran, IRAN, m.bojnordi@ece.ut.ac.ir ; Semsarzadeh, M. ; Banaiyan, A. ; Afzali-Kusha, A.

Considering the typically large use of NoCs as a solution to alleviate complexity of the current SoCs, designing an efficient NoC is an important key issue. This paper proposes a simple, low-cost and low-energy switch architecture for the NoCs using mesochronous clocking scheme for on-chip communication. Switches are designed in Verilog HDL. Experimental results show that the 4-ports instances of our proposed architecture are more efficient to be used as a basic element for constructing the NoCs.

Published in:

Microelectronics, 2005. ICM 2005. The 17th International Conference on

Date of Conference:

13-15 Dec. 2005