Referenced Items are not available for this document.
This letter presents the design and implementation of a dual-modulus (64/65) prescaler based upon the phase-switching technique. Low power consumption is achieved by using one dynamic flip-flop in the full-speed divide-by-four circuit and no power-hungry synchronizing circuits to tackle the glitch problem. The proposed design is fabricated using 0.35-μm standard CMOS process and is measured to operate from 2.08-2.66GHz with power dissipation of less than 1mW.
Published in:
Microwave and Wireless Components Letters, IEEE
(Volume:16
,
Issue:
2
)
Date of Publication: Feb. 2006
- Page(s):
- 75 - 77
- ISSN :
- 1531-1309
- INSPEC Accession Number:
- 8769867
- Digital Object Identifier :
- 10.1109/LMWC.2005.863223
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 February 2006
- Issue Date :
- Feb. 2006
- Sponsored by :
- IEEE Microwave Theory and Techniques Society
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