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CMOS Stuck-Open Fault Detection Using Single Test Patterns

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3 Author(s)
Rajsuman, R. ; Department of Computer Engineering, Case Western Reserve University, Cleveland, OH ; Jayasumana, A.P. ; Malaiya, Y.K.

CMOS combinational circuits exhibit sequential behavior in the presence of open faults, thus making it necessary to use two pattern tests. Two or multi-pattern sequences may fail to detect CMOS stuck-open faults in the presence of glitches. The available methods for augmenting CMOS gates to test CMOS stuck-open faults, are found to be inadequate in the presence of glitches. A new CMOS testable design is presented. The scheme uses two additional MOSFETs, which convert a CMOS gate to either pseudo nMOS or pseudo pMOS gate during testing. The proposed design ensures the detection of stuck-open faults using a single vector during testing.

Published in:

Design Automation, 1989. 26th Conference on

Date of Conference:

25-29 June 1989