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A Case Study in Silicon Compilation Software Engineering, HVDEV High Voltage Device Layout Generator

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1 Author(s)
Elias, N.J. ; Philips Laboratories North American, Philips Corporation

Philips Laboratories has developed HVDEV, a procedural language layout generator for compiling high voltage MOS device layouts from behavioral specifications. HVDEV is analyzed as a case study in silicon compilation software engineering. The paper formulates a comparative analysis to conventional layout design accounting for software development and maintenance. Critical factors in planning silicon compilation software development are identified.

Published in:

Design Automation, 1987. 24th Conference on

Date of Conference:

28-1 June 1987