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Division and square-rooting using a split multiplier

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2 Author(s)
Wong, W.F. ; Goto Lab., Inst. of Phys. & Chem. Res., Saitama, Japan ; Goto, E.

A modification is proposed to the traditional design of a fast floating point multiplication circuit such that instead of just performing A*B where A and B are m bits long, it is also capable of performing C*x0 and D*x1 where C and D are still m bits long but x0 and x1 are m/2 bits long using about the same amount of hardware resources but in two thirds of the time. Such a circuit is called a split multiplier. The authors show how such a split multiplier can be used to compute division and Y/ square root (X) accurately and quickly.

Published in:

Electronics Letters  (Volume:28 ,  Issue: 18 )

Date of Publication:

27 Aug. 1992

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