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The Hughes Automated Layout System (HAL) is intended to provide fast, accurate, and efficient layout of LSI/VLSI circuits. The HAL development plan calls for an evolutionary development in three phases, with each phase providing a usable design system. HAL(I) is limited to standard cell layout and is now operational. HAL(II), which will permit more complex geometries, and HAL(III), which will add hierarchical capabilities, are in initial development. This paper discusses the features of HAL(I), and the concepts of decomposition and ordering of routing domains that underlie the more advanced systems.