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Multiple tests for each gate delay fault: higher coverage and lower test application cost

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3 Author(s)
S. Irajpour ; Dept. of EE - Syst., Southern California Univ., Los Angeles, CA, USA ; S. K. Gupta ; M. A. Breuer

Different tests for a single gate delay fault can detect different ranges of delay fault sizes. It is of interests to determine whether, for most faults, a single test covers all the ranges of delay fault sizes covered collectively by all tests for the fault. Using an enhanced gate delay fault simulation algorithm, we show that for a considerable number of gate delay faults in benchmark circuits, multiple tests collectively provide more comprehensive coverage than any single test. We then present many key implications of this observation, especially in the areas of test generation and test set compaction

Published in:

IEEE International Conference on Test, 2005.

Date of Conference:

8-8 Nov. 2005