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Symbolic time-domain behavioral and performance modeling of linear analog circuits using an efficient symbolic Newton-iteration algorithm for pole extraction

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3 Author(s)
Chakraborty, R. ; Digital Design Environ. Lab., Cincinnati Univ., OH, USA ; Ranjan, M. ; Vemuri, R.

Symbolic modeling techniques employ behavioral models to capture the input-output relationships of linear(ized) analog circuits in conjunction with performance models to measure performance metrics. The formulation of symbolic design equations depicting AC behavior of analog circuits has been fully automated in most symbolic analysis programs. Symbolic time-domain modeling till date relies extensively on manual abstraction. In this paper, we propose an automated technique for generation of symbolic behavioral and performance models that analyze time-domain characteristics of linear(ized) analog circuits. A fully symbolic time-domain analyzer has been integrated into the analog circuit synthesis flow. The calculation of time-domain response using inverse Laplace transform is facilitated by a fully symbolic pole extraction methodology. The mainstay for this pole extraction technique is an efficient symbolic Newton-iteration algorithm based on graph theory. Significant speedup is achieved using pre-compiled symbolic models inside the synthesis loop, thereby alleviating the computational inefficiencies introduced by full numerical simulation and performance estimation. The classes of analog circuits that we have synthesized using symbolic modeling techniques with effective performance closure include filters and operational amplifiers.

Published in:

VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on

Date of Conference:

3-7 Jan. 2006