Skip to Main Content
This paper describes time-interleaved delta ADC as a digital interface for low frequency MEMS sensor signal. The design is presented as a simple low power solution for A/D conversion in comparison to popular sigma-delta converters. Conventional delta modulator is modified with insertion of an array of comparators and a coder i.e. an up/down counter. Time interleaving is done within the array to operate the sensitive analog part in slower speed while maintaining a higher oversampling ratio of the converter. The up/down counter acts as low-pass filter in the delta modulation loop and by resetting it in proper interval decimation can also be performed. Simulation of the test structure for the 6-bit ADC in 0.18μm CMOS process shows output SNR of 60dB, with INL and DNLs less than 0.5 LSB. The output SNR is equivalent to 10-bit of resolution. To obtain such resolution with only 6-bit output the total power the design consumes from a single 1.8 V supply is only 2.3mW. The die area of the ADC is only 0.8mm × 0.6mm.