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Mumford and Shah functional: VLSI analysis and implementation

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2 Author(s)
M. Martina ; Dipt. di Elettronica, Politecnico di Torino, Italy ; G. Masera

This paper describes the analysis of the Mumford and Shah functional from the implementation point of view. Our goal is to show results in terms of complexity for real-time applications, such as motion estimation based on segmentation techniques, of the Mumford and Shah functional. Moreover, the sensitivity to finite precision representation is addressed, a fast VLSI architecture is described, and results obtained for its complete implementation on a 0.13 μm standard cells technology are presented.

Published in:

IEEE Transactions on Pattern Analysis and Machine Intelligence  (Volume:28 ,  Issue: 3 )