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Algorithm transformations in design of digit-serial FIR filters

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3 Author(s)
Karlsson, M. ; Dept. of Technol., Kalmar Univ., Sweden ; Kulesza, W. ; Vesterbacka, M.

Algorithm transformations for increased throughput and decreased power consumption in design of digit-serial FIR filters are discussed in this paper. Pipelining has been used for a long time for increasing the throughput of sequential algorithms. Here we introduce algorithm unfolding, which traditionally has been used in implementation of recursive algorithms, in a sequential FIR algorithm. Pipelining at algorithm and logic level, and algorithm unfolding are compared by HSPICE simulations of netlists extracted from layouts. For a given throughput requirement, the simulations show that algorithm unfolding without any pipelining is preferable for low power operation. Algorithm unfolding yields a decrease of the power consumption with 40, and 50 percent compared to pipelining at the logic or algorithm level, respectively. For minimum power consumption the digit-size should be tuned with the throughput requirement, i.e., using a large digit-size for low throughput requirement and decrease the digit-size with increasing throughput.

Published in:

Signal Processing Systems Design and Implementation, 2005. IEEE Workshop on

Date of Conference:

2-4 Nov. 2005