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A discrete time quad-band GSM/GPRS receiver in a 90nm digital CMOS process

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20 Author(s)
K. Muhammad ; Texas Instruments Inc., Dallas, TX, USA ; Y. C. Ho ; T. Mayhugh ; C. M. Hung
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We present the receiver in the first single-chip GSM transceiver that incorporates full integration of quad-band receiver, transmitter, memory, power management, dedicated ARM processor and RF built-in self test in a 90 nm digital CMOS process. The architecture uses direct RF sampling in the receiver and an all-digital PLL in the transmitter. The receive chain uses discrete-time analog signal processing to down convert, down- sample, filter and analog-to-digital convert the received signal. An auxiliary feedback is provided at the mixer output that can linearize the entire receive chain. The receiver meets a sensitivity of -110 dBm at 60 mA in a 1.4V digital CMOS process

Published in:

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005.

Date of Conference:

21-21 Sept. 2005