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A low noise, high power supply rejection low dropout regulator for wireless system-on-chip applications

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5 Author(s)
Hoon, S.K. ; Wireless Analog Technol. Center, Texas Instruments, Dallas, TX ; Chen, S. ; Maloberti, F. ; Chen, J.
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This paper presents a novel two-stage low dropout regulator (LDO) that minimizes output noise via a pre-regulator stage and achieves high power supply rejection via a simple subtractor circuit in the power driver stage. The LDO is fabricated with a standard 0.35mum CMOS process and occupies 0.26 mm2 and 0.39mm2 for single and dual output respectively. Measurement showed PSR is 60dB at 10kHz and integrated noise is 21.2uVrms ranging from 1kHz to 100kHz

Published in:

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

Date of Conference:

21-21 Sept. 2005

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