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A synthesized compact model of substrate coupling resistance for lightly doped substrate processes is proposed. The model incorporates all geometrical parameters including geometrical mean distance with a few process-dependent fitting coefficients. The model accuracy is shown to be within 15% error using the measurement data from two test chips, one in a customized lightly doped process and the other one in a 0.18-μm BiCMOS lightly doped process. Substrate noise distribution on a 2 mm by 2 mm chip with 319 substrate contacts is shown with the calibrated SCM model.