Skip to Main Content
In this paper, we present the implementation results of a digital 120Mb/s MIMO-OFDM wireless LAN (WLAN) baseband processor based on the proposed decoding algorithms. The processor has two MIMO-OFDM modes, space-frequency block coded OFDM (SFBC-OFDM) and space division multiplexed OFDM (SDM-OFDM). From those, it achieves a considerable performance gain as well as supports double data rates compared to the conventional IEEE 802.11a WLANs. In the results of performance evaluation, the processor requires a SNR of 1.8-27 dB for transmission modes at 10 % packet error rate (PER), and the chip is implemented with 4.8M transistors in 3.9×3.9 mm2 using 0.18μm CMOS process.