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Reconfigurable computers (RCs) can leverage the synergism between conventional processors and FPGAs by combining the flexibility of traditional microprocessors with the parallelism of hardware and reconfigurability of FPGAs. However, there exist multiple challenges that must be resolved to be able to develop efficient applications for reconfigurable computing systems. One of these challenges is the lack of formal modeling/design methodology. This work, addresses the need for a formal design methodology. In particular, a structured design life-cycle, which can be applied at the reconfigurable computing systems rather than at the chip-level as it has been traditionally the case, is conceptually proposed, formally modeled and experimentally verified.