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High performance channel model hardware emulator for 802.11n

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5 Author(s)
Dassatti, A. ; VLSI Lab., Politecnico di Torino, Italy ; Masera, G. ; Nicola, M. ; Concil, A.
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In this paper, the design and implementation of a new high performance hardware channel emulator is presented. The purpose of the developed emulator is to efficiently reproduce in a laboratory environment the accurate behaviour of several effects of the radio channel over a multiple antennas wireless communication system, including AWGN (additive white Gaussian noise), multipath, attenuation and Doppler shift. The main application target is the test and the performance evaluation of a new 802.11n transceiver. The prototype has been implemented on a board including both an ARM processor and a field programmable gate array (FPGA), and it supports the simulation of a 40 MHz radio frequency bandwidth.

Published in:

Field-Programmable Technology, 2005. Proceedings. 2005 IEEE International Conference on

Date of Conference:

11-14 Dec. 2005

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