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In this paper, a new complementary gate driver for power metal-oxide semiconductor field-effect transistors and insulated gate bipolar transistors is presented based on the use of a piezoelectric transformer (PT). This type of transformer has a high integration capability. Its design is based on a multilayer structure working in the second thickness resonance mode. A new design method has been used based on an analytical Mason model in order to optimize the efficiency, the available power at the transformer secondary ends, and the total volume. This design method takes into account mechanical losses and heating of the piezoelectric material; it can be extended to predict the characteristics of the PT: gain, transmitted power, efficiency, and heating of piezoelectric materials according to load resistance. A prototype of a PT rated for an inverter-leg gate driver was fabricated and tested experimentally. All calculated characteristics have been confirmed by measurements. Satisfactory results have been obtained in driving a 10-A/300-V/10-kHz chopper. Moreover, a study has been carried out about the propagation of common mode currents between the top-switch and the bottom-switch of the inverter leg throughout the driver in order to avoid cross-talking failures.