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Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor

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25 Author(s)
Pham, D.C. ; Technol. Group, IBM Syst., Austin, TX, USA ; Aipperspach, T. ; Boerstler, D. ; Bolliger, M.
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This paper reviews the design challenges that current and future processors must face, with stringent power limits, high-frequency targets, and the continuing system integration trends. This paper then describes the architecture, circuit design, and physical implementation of a first-generation Cell processor and the design techniques used to overcome the above challenges. A Cell processor consists of a 64-bit Power Architecture processor coupled with multiple synergistic processors, a flexible IO interface, and a memory interface controller that supports multiple operating systems including Linux. This multi-core SoC, implemented in 90-nm SOI technology, achieved a high clock rate by maximizing custom circuit design while maintaining reasonable complexity through design modularity and reuse.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:41 ,  Issue: 1 )

Date of Publication:

Jan. 2006

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