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A 20-gb/s 256-mb DRAM with an inductorless quadrature PLL and a cascaded pre-emphasis transmitter

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7 Author(s)
Kyu-hyoun Kim ; Image Dev. Team, Samsung Electron., Gyeonggi-Do, South Korea ; Young-Soo Sohn ; Chan-Kyoung Kim ; Moonsook Park
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A 20-Gb/s 256-Mb DRAM with the proposed PLL and transmitter schemes has been designed and fabricated using an 80-nm CMOS process. An inductorless tetrahedral oscillator generates inherent quadrant phases combined with cascaded pre-emphasis transmitter achieves 10-Gb/s/pin data rate.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:41 ,  Issue: 1 )