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The use of functional vectors has been an industry standard for speed binning of high-performance ICs. This practice can be prohibitively expensive as ICs become faster and more complex. In comparison, structural patterns target performance related faults in a more systematic manner. To make structural testing an effective alternative for speed binning, this paper investigates the correlation between functional test frequency and the test frequencies of various types of structural patterns on MPC7455, a Motorola microprocessor compatible to PowerPC™ instruction set architecture.