Extended-DDF modeling embedded system design: adapting to IP technology

This paper extends DDF (dynamic date flow graph) to a large-grain model which can guide system design in function level. The adoption of a novel algorithm, as well as a formal definition for cDDF, strengthens the capacity of DDF as a formal specification model. Starting from a lower level of abstraction, it merges sub-modules into a larger one by extracting the input/output relations. The extracted I/O relations, together with the new module's functional description, could serve as IP core selection criteria in design space exploration. Normal DDF merely decomposes compound node into simpler ones. The algorithm presented in this paper provides a reverse process which exploits the hierarchical characteristic of DDF by capturing both data and control flow in different level of abstraction. The important steps in design work, such as function partition, scheduling, optimization, etc., are also reconsidered synthetically to adapt the introduction of the new idea.