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High throughput rate EBCOT architecture for JPEG2000

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4 Author(s)
Jen-Shiun Chiang ; Dept. of Electr. Eng., Tamkang Univ., Taipei, Taiwan ; Chun-Hau Chang ; Yu-Sen Lin ; Chang-Yuo Hsieh

This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ coder) for the embedded block coding (EBCOT) unit of the JPEG2000 encoder. The Tier-1 of the EBCOT consumes most of the time in a JPEG2000 encoding system. The proposed parallel architecture can increase the throughput rate of the context-modeling. To match the high throughput rate of the parallel context-modeling architecture, an efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 185MHz to encode one symbol each cycle. To compare to the conventional context-modeling architecture the presented parallel architecture can improve the throughput rate up to 25%. Because of the high throughput rate of the parallel context-modeling architecture, the concept of multi-rate processing for low power design can be applied.

Published in:

Circuits and Systems, 2003 IEEE 46th Midwest Symposium on  (Volume:2 )

Date of Conference:

27-30 Dec. 2003