A bias circuit based on resistorless bandgap reference in 0.35-/spl mu/m SOI CMOS

A bias circuit based on resistorless bandgap reference is designed and fabricated in 0.35-/spl mu/m silicon-on-insulator (SOI) CMOS. The reference voltage generated by the bandgap core which is arranged to give zero temperature coefficient (ZTC) around room temperature is buffered across a resistor to yield a constant current. This constant current is then mirrored to rationed resistors to give desired constant output voltage levels. The reference voltage is generated using inverse function technique which does not require the use of resistors in the bandgap core. Experimental results demonstrate that the largest bias voltage (1.766 V) has shown only 5 mV variation over the temperature range (20 /spl deg/C to 125 /spl deg/C).