By Topic

Fault tolerant solid state mass memory for space applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Cardarilli, G.C. ; Dept. of Electron. Eng., Univ. of Rome "Tor Vergata", Italy ; Ottavi, M. ; Pontarelli, S. ; Re, M.
more authors

In this paper, an innovative fault tolerant solid state mass memory (FTSSMM) architecture is described. Solid state mass memories (SSMMs) are particularly suitable for space applications and more in general for harsh environments such us, for example, nuclear accelerators or avionics. The presented FTSSMM design has been entirely based on commercial off the shelf (COTS) components. In fact, cost competitive and very high performance SSMMs cannot be easily implemented by using space qualified components, due the technological gap and very high cost characterizing these components. In order to match the severe reliability requirements of space applications a COTS-based apparatus must be designed by using suitable system level methodologies (Kluth, 1996 and Fichna, 1998). In the proposed architecture, error-correcting codes are used to strengthen the commercial dynamic random access memory (DRAM) chips, while the system controller has been designed by applying suitable fault tolerant design techniques. Different from other proposed solutions, our architecture fully exploits the reconfiguration capabilities of Reed-Solomon (RS) codes, discriminates between permanent and transient faults reducing the use of spare elements, and provides dynamic reconfiguration and graceful degradation capability, i.e., the FTSSMM performances are gracefully reduced in case of permanent faults, maintaining part of the system functionality. The paper shows the FTSSMM design methodology, the architecture, the reliability analysis, some simulation results, and a description of its implementation based on fast prototyping techniques.

Published in:

Aerospace and Electronic Systems, IEEE Transactions on  (Volume:41 ,  Issue: 4 )