By Topic

Silicon based system-in-package: a passive integration technology combined with advanced packaging and system based design tools to allow a breakthrough in miniaturization

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
F. Murray ; Philips Semicond., Caen, France

The very large development of home and domestic electronic appliances as well as portable device has led the microelectronics industry to evolve in two complimentary directions: "More Moore" with the continuous race towards extremely small dimensions hence the development of SoCs (system on chip) and more recently a new direction that we could name "More than Moore" with the integration of devices that were laying outside the chips and thus the creation of SiPs (system in package). Even though one can oppose SoCs to SiPs, one of the intentions of this paper is to demonstrate that these two approaches are not in competition one with the other. We show some examples of systems that integrate several SoCs. The technology presented is called silicon based system in package. This new technology is based upon the integration of passive devices into silicon. The four critical elements of this technology will be discussed in detail: passive integration, advanced packaging, new IC design development tools, and innovative testing.

Published in:

Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005.

Date of Conference:

9-11 Oct. 2005