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This paper presents the circuit model of a microstrip patch antenna on a ceramic land grid array (CLGA) package for the antenna-chip codesign of a highly integrated radio-frequency (RF) transceiver. The microstrip patch antenna is fed by packaging interconnect components such as bond wires, signal traces, and vias in a ground-signal-ground (G-S-G) configuration from the carried chip. The circuit model that consists of RLC lumped elements of both microstrip patch antenna and feeding interconnect components has been developed with an emphasis on verifying existing or deriving analytical formulas. The RLC values of the microstrip patch antenna are calculated with our improvements to existing computer-aided design formulas, while the RLC values of the feeding interconnect components are calculated with more efforts. In particular the C values related to the vias and signal traces require to be calculated numerically and they are calculated here with the method of moments and the conformal mapping method, respectively. The circuit model is validated with numerical simulations (High Frequency Structure Simulator) and network analyzer measurements.