Skip to Main Content
For the first time, the 65nm high performance transistor technology and the highly compacted double stacked S3 SRAM cell with a size of 25F2, and 0.16μm2 has been combined for providing the high density and high density solutions which can make the breakthrough in the field of the cache memory products and the network memory products. The SSTFT (single-crystal silicon thin film transistor) is used not only for cell transistors but also for peripheral transistors. The selective Co silicidation techniques is developed for low resistance. By utilizing this technology, the high performance 288Mb synchronous SRAM product will be fabricated.
Date of Conference: 12-16 Sept. 2005