Threshold voltage reduction in strained-Si/SiGe MOS devices due to a difference in the dielectric constants of Si and Ge

We show that a higher value of the dielectric constant in SiGe relative to that in Si causes a reduction in the magnitude of the threshold voltage in strained-Si/SiGe n- and p-MOSFETs. This reduction increases with decreasing thickness of the strained-Si layer. Our results are consistent with the observed mismatch between calculated and measured threshold voltage shifts in strained-Si MOSFETs.