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An integrated 2 × 2 semiconductor optical amplifier gate matrix switch is characterized for use in an optical packet buffer. Error-free performance for all port configurations is demonstrated for 40 Gb/s with less than 1-dB power penalty and an input power dynamic range of greater than 15 dB. Switching times are measured for decreasing optical input power to show an upper limit of 1-ns rise time (20%-80%). The factors limiting the maximum number of recirculations are explored toward optimizing future designs. It is concluded that the amplifier gate matrix switch is suitable for optical packet buffering.
Date of Publication: Jan. 1, 2006