Referenced Items are not available for this document.
An integrated 2 × 2 semiconductor optical amplifier gate matrix switch is characterized for use in an optical packet buffer. Error-free performance for all port configurations is demonstrated for 40 Gb/s with less than 1-dB power penalty and an input power dynamic range of greater than 15 dB. Switching times are measured for decreasing optical input power to show an upper limit of 1-ns rise time (20%-80%). The factors limiting the maximum number of recirculations are explored toward optimizing future designs. It is concluded that the amplifier gate matrix switch is suitable for optical packet buffering.
Published in:
Photonics Technology Letters, IEEE
(Volume:18
,
Issue:
1
)
Date of Publication: Jan. 1, 2006
- Page(s):
- 103 - 105
- ISSN :
- 1041-1135
- INSPEC Accession Number:
- 8811814
- Digital Object Identifier :
- 10.1109/LPT.2005.860386
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 19 December 2005
- Issue Date :
- Jan. 1, 2006
- Sponsored by :
- IEEE Photonics Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
