By Topic

A novel bidirectional CMOS transceiver for chip-to-chip optical interconnects

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Sae-Kyoung Kang ; Opt. Interconnection & Switching Lab., Inf. & Commun. Univ., Daejeon, South Korea ; Tae-Woo Lee ; D. V. Plant ; Hyo-Hoon Park

A novel bidirectional complementary metal-oxide-semiconductor (CMOS) transceiver for chip-to-chip optical interconnects operating at 2.5 Gb/s is proposed, which shares the common block of a receiver and a transmitter on a single chip. The share of the common block of two circuits makes it possible to save 55% or 20% of power dissipation, depending on the operating mode. The chip in 0.18-μm CMOS technology occupies an area of 0.82×0.82 mm2, 70% of the total area of a typical unshared transceiver chip. The transmitting and receiving modes of operation show -3-dB bandwidths of 2.2 and 2.4 GHz and electrical isolations of -28 and -40 dB, respectively.

Published in:

IEEE Photonics Technology Letters  (Volume:18 ,  Issue: 1 )