By Topic

Design exploration in HW/SW co-design of real-time object-oriented embedded systems: the scheduler object

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Silva, E.T., Jr. ; Comput. Sci. Inst., Rio Grande do Sul Fed. Univ., Brazil ; Wehrmeister, M.A. ; Becker, L.B. ; Wagner, F.R.
more authors

This paper discusses a design flow for multithread object-oriented real-time applications, running on top of an embedded, platform-based, customizable Java processor, which is prototyped using affordable FPGAs. The proposed approach enforces design space exploration activities, taking into account aspects like temporal behavior, memory footprint, and power/energy consumption. A case study containing a task scheduler implementation as both software and hardware modules is presented. While both implementations are compatible with the developed program from an interface point of view, they lead to different timing and footprint requirements. Their evaluation in terms of memory occupation and number of FPGA logic cells is presented.

Published in:

Object-Oriented Real-Time Dependable Systems, 2005. WORDS 2005. 10th IEEE International Workshop on

Date of Conference:

2-4 Feb. 2005